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NIMCET Previous Year Questions (PYQs)

NIMCET Organization Of A Computer PYQ

NIMCET PYQ
Debugger is a program that





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NIMCET Previous Year PYQNIMCET NIMCET 2025 PYQ

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NIMCET PYQ
Dynamic RAM (DRAM) stores each bit of data in a separate capacitor. Due to leakage, the stored charge tends to dissipate over time and needs to be refreshed periodically. Consider the following statements:
P: DRAM requires refreshing because it uses capacitors to store bits. 
Q: SRAM does not require refreshing because it uses flip-flops instead of capacitors.
R: DRAM is faster than SRAM because it needs less frequent access.
S: DRAM is more suitable for main memory than SRAM due to its density.





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NIMCET Previous Year PYQNIMCET NIMCET 2025 PYQ

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NIMCET PYQ
In the design of a control unit of a processor, two common approaches are used: hardware control and microprogrammed control. Consider the following statements: 
  1. Hardware control units are generally faster but more difficult to modify than microprogrammed control units. 
  2. In a horizontal microprogrammed control unit, each control signal has a separate bit in the control word. 
  3. Vertical microprogramming leads to longer control words but provides greater parallelism. 
  4. Microprogrammed control units are typically easier to implement and modify than hardware control units.





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NIMCET PYQ
Consider a system with a CPU having 6 registers and 32-bit instructions. The maximum possible size of the main memory is 512 KB ($1K = 2^{10}$). Each instruction takes two registers and one memory address as operands. Which one of the following correctly gives the maximum possible distinct instructions that can be there in the instruction set of the CPU?





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NIMCET Previous Year PYQNIMCET NIMCET 2025 PYQ

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NIMCET PYQ
Match all items in Group 1 with correct options from those given in Group 2.
 GROUP 1 GROUP 2
 P. Intermediate representation 1. Activation records
 Q. Top-down parsing 2. Code generation
 R. Runtime environments 3. Leftmost derivation
 S. Register allocation 4. Graph colouring





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NIMCET PYQ
Consider a system running under two types of workloads: 
(a) CPU-intensive jobs, 
(b) I/O-intensive jobs. Which of the following statements about the relative performance of Interrupt-driven I/O and Programmed I/O is correct?





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NIMCET Previous Year PYQNIMCET NIMCET 2025 PYQ

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NIMCET PYQ
The time required for fetching and execution of one simple machine instruction is known as





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NIMCET PYQ
Consider the program below which uses six temporary variables a, b, c, d, e, and f.
a = 1 
b = 10
c = 20 
d = a + b
e = c + d 
f = c + e 
b = c + e 
e = b + f 
d = 5 + e
return d + f
Assuming that all the above operations take their operands from registers, the minimum number of registers needed to execute this program without spilling is





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NIMCET Previous Year PYQNIMCET NIMCET 2024 PYQ

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Detailed Register Allocation Analysis

Objective: Determine the minimum number of registers needed to execute the program without spilling.

Live Range Analysis:

  • a: Line 1 → 4
  • b: Line 6 → 7
  • c: Line 3 → 6
  • d: Line 8 → 9
  • e: Line 7 → 8
  • f: Line 5 → 9

Max live variables: 3 (after lines 6 and 7)

✅ Final Answer: 3 registers are required to execute the program without spilling.

NIMCET PYQ
Which of the following components is not a part of an instruction formation in CPU processing?





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NIMCET Previous Year PYQNIMCET NIMCET 2024 PYQ

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Instruction Formation in CPU Processing

Question: Which of the following is not a part of instruction formation?

Options:

  • Opcode
  • Register file
  • Source operand
  • Destination operand

✅ Correct Answer: Register File

Explanation:

  • Opcode, Source operand, Destination operand — all are part of the instruction format.
  • Register File — a hardware structure that stores registers, but it is not encoded into the instruction.

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